Researchers present ChipNeMo, using domain adaptation to enhance LLMs for chip design, achieving up to 5x model size reduction with better performance.
Authors: Mingjie Liu, NVIDIA {Equal contribution}; Teodor-Dumitru Ene, NVIDIA {Equal contribution}; Robert Kirby, NVIDIA {Equal contribution}; Chris Cheng, NVIDIA {Equal contribution}; Nathaniel Pinckney, NVIDIA {Equal contribution}; Rongjian Liang, NVIDIA {Equal contribution}; Jonah Alben, NVIDIA; Himyanshu Anand, NVIDIA; Sanmitra Banerjee, NVIDIA; Ismet Bayraktaroglu, NVIDIA; Bonita Bhaskaran, NVIDIA; Bryan Catanzaro, NVIDIA; Arjun Chaudhuri, NVIDIA; Sharon Clay, NVIDIA; Bill Dally, NVIDIA;...
exerts a substantial positive impact on tasks within the domain itself. This effect is manifested in significant improvements in internal design knowledge as well as general circuit design knowledge. The use of larger and more performant foundational models yields better zero-shot results on domain-specific tasks.
while maintaining a balance that did not veer too far from the base model, thus preserving general natural language capabilities. We also explored the application of Parameter Efficient Fine-Tuning in the context of Domain-Adaptive Pretraining . In this pursuit, we conducted two experiments involving the incorporation of LoRA adapters , introducing additional parameters of 26.4 million and 211.2 million respectively.
, the model had little to no understanding of the underlying APIs and performed poorly on automatically evaluated benchmarks. Domain SFT further improved the results. We believe this is because our domain SFT data helps guide the model to present the final script in the most directly applicable fashion. One interesting result is the LLaMA2-70B pass rate on “Hard with Context” benchmarks. It performs better than most models on the Python tool but poorly on the Tcl tool.
. B. Domain Adaptive Pretraining B. Domain Adaptive Pretraining Figure 6 presents the outcomes for ChipNeMo models on the AutoEval benchmark for chip design domain and open domain academic benchmarks. Our research findings can be summarized as follows: with in-domain tasks exhibit a positive correlation with model size, with larger models demonstrating more pronounced enhancements in domain-specific task performance post-
exerts a substantial positive impact on tasks within the domain itself. This effect is manifested in significant improvements in internal design knowledge as well as general circuit design knowledge. with in-domain tasks exhibit a positive correlation with model size, with larger models demonstrating more pronounced enhancements in domain-specific task performance post-
while maintaining a balance that did not veer too far from the base model, thus preserving general natural language capabilities. We also explored the application of Parameter Efficient Fine-Tuning in the context of Domain-Adaptive Pretraining . In this pursuit, we conducted two experiments involving the incorporation of LoRA adapters , introducing additional parameters of 26.4 million and 211.2 million respectively.
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